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asahi kasei [ ak 4584 ] ms0118-j-01 2001/11 - 1 - ?t?@?@?v AK4584 ? 24 ?r?b?g?a 96khz ???r?[?f?b???o?v?x?e??????????\ 24bit codec ????b adc ?????c?h ?_?c?i?~?b?n?????w?e??????g???n???x?g ?e?f???a???r?b?g?????e??p??a dac ???v?j?-??a?h?o ???x?g ?e?}???`?r?b?g?????e??p?a?x??l??_?c?i?~?b?n?????w????????o?m?c?y?e??????????b ????a AK4584 ? 24 ?r?b?g?a 192khz ?????????f?b?w?^???i?[?f?b?i?g?????x?~?b?^ (dit) ???f?b?w?^ ???i?[?f?b?i???v?[?o (dir) ?e?????a ac-3/mpeg ??? non-pcm ?f?[?^?x?g???[???e???????o????b ?f?b?w?^???i?[?f?b?i?o?? adc ?o????f?b?w?^?????e?i?e???????b AK4584 ??? pga ?e???? ?????a md, dvd-r, cd-r ?p?r????k????b *ac-3 ? dolby laboratories ??o?^??w????b ??@?@? 1. 24bit 2ch adc fs: max 96khz single-end input s/(n+d): 90db dynamic range, s/n: 100db digital hpf for offset cancellation input pga with +18db gain & 0.5db step input datt with ? 72db att i/f format: msb justified or i 2 s 2. 24bit 2ch dac fs: max 192khz 24bit 8 times digital filter - ripple: 0.005db, attenuation: 75db single-end output s/(n+d): 94db dynamic range, s/n: 104db de-emphasis for 32khz, 44.1khz, 48khz sampling digital attenuator with soft-transition soft mute zero detect function i/f format: msb justified, lsb justified or i 2 s 3. 3 outputs 24 bit 192khz dit 3-channel transmission outputs (2 through outputs & dit output) 40 bits channel status buffer 24bit 96khz audio codec with dit/dir ak45 84
asahi kasei [ ak 4584 ] ms0118-j-01 2001/11 - 2 - 4. 4 inputs 24bit 192khz dir supports aes3, iec60958, s/pdif, eiaj cp1201 low jitter analog pll pll lock range: 32k ~ 192khz clock source: pll or x ? tal 4 channels receiver inputs detect function - non-pcm bit stream detection - dts-cd bit stream detection - validity flag detection - sampling frequency detection - unlock & parity error detection 40 bits channel status buffer burst preamble bit pc, pd buffer for non-pcm bit stream 5. support external audio clock input master clock input - 256fs, 384fs, 512fs, 768fs (fs = 44.1khz ~ 48khz) - 256fs, 384fs (fs = 88.2khz ~ 96khz ) - 128fs, 1 92fs (fs = 176.4khz ~ 192khz ) 6. support master & slave mode 7. serial m p i/f: 4-wire serial 8. 5v operation 9. 3v power supply pin for 3v i/f 10. 44pin lqfp package 11. ta: -10 to 70 c
asahi kasei [ ak 4584 ] ms0118-j-01 2001/11 - 3 - n ?u???b?n?} dir rx2 ipga datt adc r_lrck r_bick r_data r_mclk a_lrck a_bick a_data a_mclk hpf d_lrck d_bick d_data d_mclk datt smute dac dit t_lrck t_bick t_data t_mclk rx3 rx4 lin rin rout lout tx3 tx1 lrck bick sdto sdti mcko1 audio interface rx2 rx3 rx4 lin rin tx2 tx3 tx1 tx2 lout rout lrck bick sdto sdti avdd avss dvdd dvss tvdd pvdd pvss vref vcom dzf m/s int0 pdn control register cdto cdti cclk csn mclk selector divider mcki mcko1 r xti xto x'tal osc tx1e tx2e tx3e ops1-0 ips1-0 rx1 rx1 int1 mcko2 mcko2 dmck xtale block diagram
asahi kasei [ak 4584 ] ms0118-j-01 2001/11 - 4 - n ?i?[?_?????o?k?c?h AK4584vq - 10 ~ +70 c 44pin lqfp (0.8mm pitch) akd4584 ak 4584 ?]???p?{?[?h n ?s???z?u test2 rx2 44 43 1 42 41 40 39 38 37 36 35 34 33 32 31 30 29 28 27 26 25 24 23 22 21 20 19 18 17 16 15 14 13 12 2 3 4 5 6 7 8 9 10 11 AK4584vq top view rx3 nc rx4 pdn int0 int1 cdti cdto cclk csn test3 tx1 tx2 xtale tx3 dvdd dvss tvdd xto xti/mcki dmck mcko1 mcko2 sdto sdti bick lrck m/s dzf vcom lout rout test1 rx1 pvss r pvdd lin rin vref avdd avss
asahi kasei [ak 4584 ] ms0118-j-01 2001/11 - 5 - ?s???^?@?\ no. pin name i/o function 1 test2 i test 2 pin (internal pull-down pin) 2 rx3 i receiver input 3 with amp for 0.2vpp 3 nc i nc pin (no internal bonding pin, fixed to ? avss ? ) 4 rx4 i receiver input 4 with amp for 0.2vpp 5 pdn i power-down mode pin ? h ? : power up, ? l ? : power down reset and initialize the control register. 6 int0 o interrupt 0 pin 7 int1 o interrupt 1 pin 8 cdti i control data input pin 9 cdto o control data output pin 10 cclk i control data clock pin 11 csn i chip select pin 12 test3 i test 3 pin (fixed to avss) 13 tx1 o transmitter 1 output pin 14 tx2 o transmitter 2 output pin 15 xtale i x ? tal osc enable pin ? h ? : enable, ? l ? : disable 16 tx3 o transmitter 3 output pin 17 dvdd - digital power supply pin, 4.75 ~ 5.25v 18 dvss - digital ground pin 19 tvdd - output buffer power supply pin, 2.7 ~ 5.25v 20 xto o x ? tal output pin xti i x ? tal input pin 21 mcki i external master clock input pin 22 dmck i mcko1 disable pin ? h ? : mcko1 ? l ? output, ? l ? : mcko1 output
asahi kasei [ak 4584 ] ms0118-j-01 2001/11 - 6 - 23 mcko1 o master clock output 1 pin 24 mcko2 o master clock output 2 pin 25 sdto o audio serial data output pin 26 sdti i audio serial data input pin 27 bick i/o audio serial data clock pin 28 lrck i/o input / output channel clock pin 29 m/s i master / slave mode pin ? h ? : master mode, ? l ? : slave mode 30 dzf o zero input detect pin 31 vcom o common voltage output pin, avdd/2 bias voltage of adc inputs and dac outputs. 32 lout o lch analog output pin 33 rout o rch analog output pin 34 avss - analog ground pin 35 avdd - analog power supply pin, 4.75 ~ 5.25v 36 vref i voltage reference input pin, avdd used as a voltage reference by adc & dac. vref is connected externally to filtered avdd. 37 rin i rch analog input pin 38 lin i lch analog input pin 39 pvdd - pll power supply pin, 4.75 ~ 5.25v 40 r - external resistor pin for pll 13k w 1% resistor should be connected to pvss externally. 41 pvss - pll ground pin 42 rx1 i receiver input 1 with amp for 0.2vpp 43 test1 i test 1 pin ( internal pull-down pin ) 44 rx2 i receiver input 2 with amp for 0.2vpp note: all input pins except pull-down pins should not be left floating.
asahi kasei [ak 4584 ] ms0118-j-01 2001/11 - 7 - ?a????????i (avss , dvss, pvss= 0v ; note 1) parameter symbol min max units power supplies: analog digital pll output buffer |avss ? dvss| (note 2) |avss ? pvss| (note 2) avdd dvdd pvdd tvdd d gnd1 d gnd2 - 0.3 - 0.3 - 0.3 - 0.3 - - 6.0 6.0 6.0 6.0 0.3 0.3 v v v v v v input current, any pin except supplies iin - 10 ma analog input voltage (vref, lin, rin pins) vina - 0.3 avdd+0.3 v digital input voltage 1 (except rx1-4, bick, lrck pins) vind1 - 0.3 dvdd+0.3 v digital input voltage 2 (rx1-4 pins) vind2 - 0.3 pvdd+0.3 v digital input voltage 3 (bick, lrck pins) vind3 - 0.3 tvdd+0.3 v ambient temperature (powered applied) ta - 10 70 c storage temperature tstg - 65 150 c note: 1 . ?d?3??s???o?????h?s????????l????b note: 2. avss ?? dvss, pvss ??a?i???o?o?????h???????o?3??b ??? : ???l?e??|???e?????g?p???????a?f?o?c?x?e?j???????a??????b ????a????????????3???1???b ???????e?? ( avss, dvss, pvss=0v ; note 1) parameter symbol min typ max units power supplies (note 3) analog digital pll output buffer avdd dvdd pvdd tvdd 4.75 4.75 4.75 2.7 5.0 5.0 5.0 3.0 5.25 avdd avdd dvdd v v v v voltage reference (note 4) vref 3.0 - avdd v note: 1 . ?d?3??s???o?????h?s????????l????b note: 3. avdd, dvdd, pvdd, tvdd ??d?1???????v?[?p???x?e?l?????k?v??????1???b note: 4. ????a vref ?d?3?e avdd ??????????o?3??b ??? : ?{?f?[?^?v?[?g??l??3??????e????o??2?g?p????????a???e?????c???????????? ?\?a?2????o?3??b
asahi kasei [ak 4584 ] ms0118-j-01 2001/11 - 8 - ?a?i???o??? ( ta=25 c ; avdd, dvdd, pvdd, tvdd = 5.0v ; a vss=dvss=pvss=0v; vref=avdd; fs=4 4.1k hz , 96khz, 192khz; bick=64fs; signal frequency =1khz ; 24bit data; measurement frequency=10hz ~ 20khz at fs=44.1khz, 10hz ~ 40khz at fs=96khz; 10hz ~ 80khz at fs=192khz; unless otherwise specified) parameter min typ max units input pga characteristics: input voltage (note 5) fs=44.1khz, ain=0.6 x avdd fs=96khz, ain=0.62 x avdd 2.8 2.9 3.0 3.1 3.2 3.3 vpp vpp input resistance 5 10 15 k w step size 0.2 0.5 0.8 db gain control range 0 18 db adc analog input characteristics: ipga=0db resolution 24 bits s/(n+d) ( - 0.5dbfs ) fs=44.1khz fs=96khz 84 80 90 88 db db dr ( - 60dbfs ) fs=44.1khz, a-weighted fs=96khz 94 88 100 96 db db s/n fs=44.1khz, a-weighted fs=96khz 94 88 100 96 db db interchannel isolation 90 100 db interchannel gain mismatch 0.2 0.5 db gain drift 20 - ppm/ c power supply rejection ( note 6 ) 50 - db dac analog output characteristics: resolution 24 bits s/(n+d) ( 0dbfs ) fs=44.1khz fs=96khz fs=192khz 88 86 - 94 92 84 db db db dr ( - 60dbfs ) fs=44.1khz, a-weighted fs=96khz fs=192khz 98 90 - 104 98 85 db db db s/n fs=44.1khz, a-weighted fs=96khz fs=192khz 98 90 - 104 98 85 db db db interchannel isolation 90 100 db interchannel gain mismatch 0.2 0.5 db gain drift 20 - ppm/ c output voltage (note 7) 2.8 3.0 3.2 vpp load resistance 5 k w load capacitance 25 pf power supply rejection ( note 6 ) 50 - db note: 5. ipga=0db ??????d?3??t???x?p?[?? (0db) ?b note: 6. vref ?s????d?3?e???????a avdd, dvdd, pvdd, tvdd ? 1khz, 50mvpp ??3??g?e ?d?????????b note: 7. vref ?d?3????????b vout = 0.6 x vref ?b
asahi kasei [ak 4584 ] ms0118-j-01 2001/11 - 9 - parameter min typ max units power supplies power supply current normal operation ( pdn = ? h ? ) avdd pvdd (fs=44.1khz) dvdd+tvdd ( fs=44.1khz ) ( fs=96khz ) power-down mode ( pdn = ? l ? ) ( note 8 ) avdd pvdd dvdd+tvdd 23 12 24 36 10 10 10 35 18 36 54 100 100 100 ma ma ma ma m a m a m a note: 8. ?s????f?b?w?^?????s???e dvdd ???? dvss ???????????l????b s/pdif receiver ??? ( ta= 25 c ; avdd , dv d d, pvdd=4.75 ~ 5.25 v ; tvdd=2.7 ~ 5.25v) parameter symbol min typ max units input resistance zin 10 k w input voltage vth 200 mvpp input hysteresis vhy - 50 mv input sample frequency fs 32 - 192 khz
asahi kasei [ak 4584 ] ms0118-j-01 2001/11 - 10 - ?t?b???^??? ( ta= - 10 ~ 70 c ; a vdd , d vdd, pvdd = 4.75 ~ 5.25v; t vdd = 2.7 ~ 5.25 v ; fs=4 4.1k hz ; dem=off) parameter symbol min typ max units adc digital filter (decimation lpf): passband ( note 9) 0.005db - 0.02db - 0.06db - 6.0db pb 0 - - - 20.02 20.20 22.05 19.76 - - - khz khz khz khz stopband sb 24.34 khz passband ripple pr 0.005 db stopband attenuation sa 80 db group delay ( note 10 ) gd 31 1/fs group delay distortion d gd 0 m s adc digital filter (hpf) : frequency response ( note 9 ) - 3db - 0.5db - 0.1db fr 0.9 2.7 6.0 hz hz hz dac digital filter : passband ( note 9) 0.01db - 6.0db pb 0 - 22.05 20.0 - khz khz stopband sb 24.1 khz passband ripple pr 0.005 db stopband attenuation sa 75 db group delay ( note 10 ) gd 30 1/fs dac digital filter + scf + smf: frequency response: 0 ~ 20khz ~ 40khz (note 11) ~ 80khz (note 12) fr - 0.1 - 0.2 - 1.0 db db db note: 9. ?e?u????????g??? fs ( ?v?x?e???t???v?????o???[?g ) ????????b ??|???a pb=20.02khz (@-0.02db) ? 0.454 x fs ????b?e????? 1khz ?e?????????b note: 10. ?f?b?w?^???t?b???^?????x?????z???a adc ????a?i???o?m???a???3??????????`???l??? 24 ?r?b?g?f?[?^?a adc ?o????w?x?^??z?b?g?3??????????????b dac ??? 24 ?r?b?g?f?[?^?a dac ?????w?x?^??z?b?g?3????????a?i???o?m???a?o??3?????? ????????b note: 11. fs=96khz ???b note: 12. fs=192khz ???b
asahi kasei [ak 4584 ] ms0118-j-01 2001/11 - 11 - dc ??? ( ta= - 10 ~ 70 c ; avdd , dv d d, pvdd=4.75 ~ 5.25 v ; tvdd=2.7 ~ 5.25v) parameter symbol min typ max units high-level input voltage (except xti pin) (xti pin) low-level input voltage (except xti pin) (xti pin) vih vih vil vil 2.2 70%dvdd - - - - - - - - 0.8 30%dvdd v v v v input voltage at ac coupling (xti pin, note 13) vac 40%dvdd - - vpp high-level output voltage (except tx1-3, dzf pins : iout= - 400 m a ) (tx1-3 pin : iout= - 400 m a ) (dzf pin : iout= - 400 m a ) low-level output voltage ( iout=400 m a ) voh voh voh vol tvdd-0.5 dvdd-0.5 avdd-0.5 - - - - - - - - 0.5 v v v v tx output voltage level (note 14) voh 0.4 0.5 0.6 v input leakage current iin - - 10 m a note: 13. xti ?s????j?b?v?????o?r???f???t?e???????? (figure 3 ?q?? ) ?b note: 14. figure 7 ?q???b
asahi kasei [ak 4584 ] ms0118-j-01 2001/11 - 12 - ?x?c?b?`???o??? ( ta= - 10 ~ 70 c ; avdd, dvdd, pvdd = 4.75 ~ 5.25 v , tvdd=2.7 ~ 5.25v ; c l =2 0pf ) parameter symbol min t yp max units master clock timing crystal resonator frequency 11.2896 24.576 mhz external clock frequency pulse width low pulse width high fclk tclkl tclkh 11.2896 0.4/fclk 0.4/fclk 36.864 mhz ns ns mcko1 output frequency duty cycle (note 15) fmck dmck 11.2896 40 50 24.576 60 mhz % mcko2 output frequency duty cycle fmck dmck 5.6448 40 50 18.432 60 mhz % pll clock recover frequency fpll 32 192 khz lrck frequency normal speed mode (dfs0= ? 0 ? , dfs1= ? 0 ? ) double speed mode (dfs0= ? 1 ? , dfs1= ? 0 ? ) quad speed mode (dfs0= ? 0 ? , dfs1= ? 1 ? ) fsn fsd fsq 32 88.2 176.4 48 96 192 khz khz khz duty cycle slave mode master mode 45 50 55 % % audio interface timing slave mode bick period bick pulse width low pulse width high lrck edge to bick ? - ? (note 16) bick ? - ? to lrck edge (note 16) lrck to sdto ( msb ) ( except i 2 s mode ) bick ? ? to sdto sdti hold time sdti setup time tbck tbckl tbckh tlrb tblr tlrs tbsd tsdh tsds 81 33 33 20 20 20 20 20 20 ns ns ns ns ns ns ns ns ns master mode bick frequency bick duty bick ? ? to lrck bick ? ? to sdto sdti hold time sdti setup time fbck dbck tmblr tbsd tsdh tsds - 20 - 20 20 20 64fs 50 20 20 hz % ns ns ns ns note: 15. ?o???n???b?n???????a duty ????????????1???b note: 16. ???k?i?l? lrck ??g?b?w?? bick ? ? - ? ?a?d??????????k????????b
asahi kasei [ak 4584 ] ms0118-j-01 2001/11 - 13 - parameter symbol min t yp max units control interface timing cclk period cclk pulse width low pulse width high cdti setup time cdti hold time csn ? h ? time csn ? ? to cclk ? - ? cclk ? - ? to csn ? - ? cdto delay csn ? - ? to cdto hi-z tcck tcckl tcckh tcds tcdh tcsw tcss tcsh tdcd tccz 200 80 80 40 40 150 50 50 45 70 ns ns ns ns ns ns ns ns ns ns reset timing pdn pulse width (note 17) rstadn ? - ? to sdto valid (note 18) tpd tpdv 150 516 ns 1/fs note: 17. AK4584 ? pdn = ? l ? ?????z?b?g?3????b note: 18. rstadn ?r?b?g?e????????????? lrck ?n???b?n? ? - ? ?????????b
asahi kasei [ak 4584 ] ms0118-j-01 2001/11 - 14 - n ?^?c?~???o?g?` 1/fclk mclk tclkh tclkl vih vil 1/fs lrck vih vil tbck bick tbckh tbckl vih vil mcko dmck dmck 50%tvdd fmck clock timing
asahi kasei [ak 4584 ] ms0118-j-01 2001/11 - 15 - lrck vih vil tblr bick vih vil tlrs sdto 50%tvdd tlrb tbsd tsds sdti vil tsdh vih audio interface timing (slave mode) lrck bick 50%tvdd sdto 50%tvdd tbsd tsds sdti vil tsdh vih tmblr dbck 50%tvdd audio interface timing (master mode)
asahi kasei [ak 4584 ] ms0118-j-01 2001/11 - 16 - csn vih vil tcss cclk tcds vih vil cdti vih tcckh tcckl tcdh vil c1 c0 r/w cdto hi-z write/read command input timing csn vih vil tcsh cclk vih vil cdti vih tcsw vil d1 d0 cdto hi-z d2 write data input timing
asahi kasei [ak 4584 ] ms0118-j-01 2001/11 - 17 - csn vih vil cclk vih vil cdti vih vil a0 cdto a1 50%tvdd tdcd d7 d6 hi-z read data output timing 1 csn vih vil tcsh cclk vih vil cdti vih tcsw vil cdto 50%tvdd d2 d1 d0 tccz hi-z read data output timing 2
asahi kasei [ak 4584 ] ms0118-j-01 2001/11 - 18 - csn vih vil tpdv sdto tpd 50%tvdd pdn vil power down & reset timing
asahi kasei [ak 4584 ] ms0118-j-01 2001/11 - 19 - ?????? n ?f?o?c?x?????m???p?x dac, sdto ? adc, sdti, dir ?o??????a dit ? adc, sdti ?o??????x?c?b?`???? 1 ?a????e?i?e????b ????a dir, dit ?e?x???[???p?x??i?e???????b?}????x?c?b?`????o (dac1-0 etc) ????w?x?^??r?b?g? ????????b??????w?x?^?}?b?v? ?u??????v??? ( ?a?h???x 08h) ?e?q??????o?3??b adc dir dac dit dac1-0 pcm1-0 dit1-0 dem ipga hpf datt datt smute sdto sdti dit1-0 figure 1. connection input source & output source n ?}?x?^?n???b?n??????[?h AK4584 ??n???b?n?\?[?x??????a pll ?e?g?p???? x ? tal( ?o???n???b?n?\?[?x???y?? ) ?e?g?p????? cm1-0 ?r?b?g???y??3??? (table 1) ?b mode 2 ??? pll ?a unlock ??????n???b?n?\?[?x?a?????i? x ? tal ??? ????????b mode 3 ????n???b?n?\?[?x? x ? tal ????????a?a?`???l???x?e?[?^?x??? rx ?f?[?^????j?^ ???????b mode 2, 3 ??? pll ?? x ? tal ???g???a?d??????????y???????e???????b xtale= ? l ? ?? ?a xtl1-0 ?r?b?g = ? 11 ? ????a mode 0 ?? x ? tal ?-?u??a?~????b cm1-0 ?r?b?g?????l? ? 01 ? ????b cm1-0 ?r?b?g?e??????|??????a?m???p?x??????i??????????1??????a?a?h???x 08h ???o??\?[?x?e?k ?x?a?i?e????o?3??b mode cm1 cm0 unlock pll x ? tal clock source 0 0 0 - on * pll 1 0 1 - off on x ? tal 0 on on pll 2 1 0 1 on on x ? tal 3 1 1 - on on x ? tal default on : ?-?u (power-up), off : ?a?~ (power-down) * : xtale= ? l ? ???a xtl1-0 ?r?b?g = ? 11 ? ??? off ?a?????o? on table 1. clock operation mode select
asahi kasei [ak 4584 ] ms0118-j-01 2001/11 - 20 - n ?}?x?^?n???b?n?o? AK4584 ??}?x?^?n???b?n?o??s???e 2 ?s?????????b?}?x?^?n???b?n?\?[?x????? pll ?????j?o??????n???b ?n?a?????o?t?? x ? tal ???-?u????n???b?n??????????e?i?e???????b pll ???[?h???a?}?x?^?n???b?n?o? (mcko1 or mcko2) ? fs ???????? ocks1-0 ?r?b?g???y???? (table 2) ?b x ? tal ???[?h?y???o???n???b?n?? ?[?h???a?}?x?^?n???b?n?o? (mcko1 or mcko2) ? 1 ?{?? 1/2 ?{?a?o??3??? (table 3) ?b????a mcko1 ? dmck ?s?????f?b?z?[?u?????????b dmck= ? h ? ?? ? l ? ?o? ( ?f?b?z?[?u?? ) ?a dmck= ? l ? ?????o?????b pll ???[ ?h???a?e?y????[?h????????a?\? fs ?? table 2 ????????a??????b mode 0 ??? 96khz ?t???v?????o? ?t?|?[?g???1???b ocks1-0 ?r?b?g?????l? ? 01 ? ????b mode ocks1 ocks0 mcko1 mcko2 fs 0 0 0 512fs 256fs ~ 48khz 1 0 1 256fs 128fs ~ 96khz 2 1 0 128fs 64fs ~ 192khz 3 1 1 64fs 32fs ~ 192khz default table 2. master clock output frequency select (pll mode) x ? tal mcko1 mcko2 11.2896mhz 11.2896mhz 5.6448mhz 12.288mhz 12.288mhz 6.144mhz 24.576mhz 24.576mhz 12.288mhz table 3. master clock output frequency select (x ? tal mode) ?e?n?c?g???h adc(ak5394) ?? dac(ak4394) ?e AK4584 ??o???????????n???b?n??i?e???@ ak45 84 ?e?}?x?^?[???[?h???g?p??a ak5394, ak4394 ?e?x???[?u???[?h???g?p?????????????b ak5394 ak4394 ?n???b?n?o? mcko2 mcko1 ???? 256fs 512fs 2 ?{?? 128fs 256fs 4 ?{?? 64fs 128fs table 4. clock select for ak5394 & ak4394
asahi kasei [ak 4584 ] ms0118-j-01 2001/11 - 21 - n ?v?x?e???n???b?n ?}?x?^?n???b?n (mclk) ? xti ?s???? xto ?s?????? x ? tal ?-?u?q?e???????a???? xto ?s???e?i?[?v??? ??? xti ?s????o?????? cmos ???x???n???b?n?e?????a ac ?j?b?v????? 40%dvdd ???????x????n???b ?n?e?????a???-????? pll ?????j?o??????n???b?n????????????b?}?x?^?n???b?n??g????a x ? tal ???[?h?y???o???n???b?n???[?h?????a icks1-0 ?r?b?g???y? (table 5) ?3??a dfs1-0 ?r?b?g?????????[?h?a 2 ?{?????[?h?a 4 ?{?????[?h?e?i?e??? (table 6) ?b 4 ?{?????[?h????a adc ??p???[?_?e???3????b x ? tal ?-?u?q?e?g?p???????a?o???????e? (xti/xto ?? dvss ?? ) ?a?k?v????b ?o???n???b?n?e?????????a dvdd ? cmos ???x???m???e?????????????a 40%dvdd ?????d?3? ?m???e ac ?j?b?v?????????????a??????b ?x???[?u???[?h????}?x?^?n???b?n?? lrck ??????k?v???????a?a????e????1??k?v??????1 ???b????a????? (pdn= ? h ? ???a?r???g???[?????w?x?^?????? pwvrn ?r?b?g?a ? h ? ??? ) ??o???n???b?n (mclk, bick, lrck) ?e?~?????????1???b??????n???b?n?a?????3???????a?????_?c?i?~?b?n? ???w?b?n?e?g?p??????????a???d???a???????a??????a?\???a??????b?n???b?n?e?~??????? ??p???[?_?e????? (pdn = ? l ? ?????r???g???[?????w?x?^?????? pwvrn ?r?b?g?e ? l ? ??y? ) ????o?3 ??b??l??a?}?x?^?[???[?h????p???[?_?e??????o??a x ? tal ?-?u?q?e?a????-?u?3?1????-???a?o???n?? ?b?n (mclk) ?e?????????a pll ?e????3?1???????o?3??b mclk mode icks1 icks0 normal (dfs1-0 = ? 00 ? ) double (dfs1-0 = ? 01 ? ) quad (dfs1-0 = ? 10 ? ) 0 0 0 256fs n/a n/a 1 0 1 384s n/a n/a 2 1 0 512fs 256fs 128fs 3 1 1 768fs 384fs 192fs default table 5. master clock input frequency select (x ? tal mode) dfs1 dfs0 sampling rate 0 0 ???? 0 1 2 ?{?? 1 0 4 ?{?? 1 1 n/a default table 6. sampling speed mclk normal fs=44.1khz mclk double fs=88.2khz mclk quad fs=176.4khz 256fs 11.2896mhz 128fs n/a 64fs n/a 384fs 16.9344mhz 192fs n/a 96fs n/a 512fs 22.5792mhz 256fs 22.5792mhz 128fs 22.5792mhz 768fs 33.8688mhz 384fs 33.8688mhz 192fs 33.8688mhz mclk normal fs=48khz mclk double fs=96khz mclk quad fs=192khz 256fs 12.288mhz 128fs n/a 64fs n/a 384fs 18.432mhz 192fs n/a 96fs n/a 512fs 24.576mhz 256fs 24.576mhz 128fs 24.576mhz 768fs 36.864mhz 384fs 36.864mhz 192fs 36.864mhz table 7. master clock frequencies example * ?????-?u???[?h? 11.2896mhz ???? 24.576mhz ?????????b *24.576mhz ?e?z?|???g????o???n???b?n????y????????b
asahi kasei [ak 4584 ] ms0118-j-01 2001/11 - 22 - n ?n???b?n?\?[?x (1) x ? tal ?e?g?p????? xti xto AK4584 figure 2. x ? tal mode - note: ?r???f???t??l??????u???q?????????b ( typ. 10 ~ 40pf) (2) ?o???n???b?n?e?g?p????? xti xto AK4584 external clock external clock xti xto AK4584 c figure 3. (a) external clock mode figure 3. (b) external clock mode (input : cmos level) (input : 3 40%dvdd) - note: dvdd ?????n???b?n?????????o?3??b (3) xti/xto ?e?g?p?????? xti xto AK4584 figure 4. off mode n 192khz ?????n???b?n???j?o?????h ???????w?b?^ pll ? 32khz ???? 192khz ????b?n?????w?e?????a???b?n????? 20ms ??o????b????a?`???l ???x?e?[?^?x??t???v?????o??g???????a?????a x ? tal ???g????????r?????a?t???v?????o???[?g (32k, 44.1k, 48k, 88.2k, 96k, 176.4k, 192k) ?e???o????b?3?????u???v???a???u???e??m????????o??a?n? ????b
asahi kasei [ak 4584 ] ms0118-j-01 2001/11 - 23 - n ?o?c?t?f?[?y?? AK4584 ? 4 ?? (rx1-4) ?????????b?e????s???t???[?h?????????a???v?a????3??????a 200mvpp ??m?????m?a?\????b ips1 ips0 input data 0 0 rx1 0 1 rx2 1 0 rx3 1 1 rx4 default table 8. recovery data select n ?o?c?t?f?[?y?o? tx1-2 ?s??????? rx ??????m????f?[?^??x???[?o??e?a tx3 ?s??????? sdti ??????f?[?^?y???a?i???o? ??e a/d ???????f?[?^?e iec60958 ?t?h?[?}?b?g????????f?[?^?y?? rx ??????m????f?[?^????????e ?o????????b tx1-2 ?s??????o???i?e? ops1-0 ?r?b?g???s??a tx3 ?s??????o???i?e? dit1-0 ?r?b?g???s????b tx1-3 ?o?? tx1e, tx2e, tx3e ??e?r?b?g???o??e?~???????a???????b c ?r?b?g?????? 5byte ?e???w?x?^???r???g???[?????????b?r???v???[?}???[?h (ct0 ?r?b?g = ? 0 ? ) ?????a bit20-23(audio channel) ?????????????y??s?a????b tch ?r?b?g?a ? 1 ? ?????x?e???i?o????????a sub frame 1 ? ? 1000 ? ( ???`???l?? ) ?a sub frame 2 ? ? 0100 ? ( ?e?`???l?? ) ?a?????i??y??3????b tch ?r?b?g?a ? 0 ? ? ??? ? 0000 ? ( ?w??? ) ??????b ????a u ?r?b?g? udit ?r?b?g???? 2 ??????????i?e???????b udit ?r?b?g?a ? 0 ? ?? ? 0 ? ????a udit ?r?b?g ?a ? 1 ? ?????j?o????? u ?r?b?g?e????? dit ?????o?????b?????[?h? pll ?a???b?n????y????????b pll ?a?a?????b?n???a u ?r?b?g? ? 0 ? ?e?o?????b ops1 ops0 output data 0 0 rx1 0 1 rx2 1 0 rx3 1 1 rx4 default table 9. output data select for tx1/2 dit1 dit0 input source 0 0 adc 0 1 sdti 1 0 dir 1 1 n/a default table 10. output data select for tx3 note: ?a?????b?n?e????? v-bit ?f?[?^?? 1 ????j?????o?3??b ?3???f?[?^?]???a??????????a?\???a??????b
asahi kasei [ak 4584 ] ms0118-j-01 2001/11 - 24 - n ?o?c?t?f?[?y?m????o????h rx AK4584 0.1uf 75 w coax 75 w figure 5. consumer input circuit (coaxial input) note 1 : coaxial ??????a???? rx ???p?^?[???????j?b?v?????o???m?c?y???x???a 50mv ?e?z ?|?????a????????a?\???a??????b?j?b?v?????o????????[?a?v?[???h????o?3??b note 2 : ??2?r?l?n?^??o?????h?y???i?[????o?????h? pc ?{?[?h???? AK4584 ? pvss ????c???s?[ ?_???x????????o?3??b rx AK4584 470 o/e optical receiver optical fiber figure 6. consumer input circuit (optical input) coaxial ???????a rx ???m???x??????????3?????a????? rx ???????n???x?g?[?n?e?n??3????? ??z??????v?[???h?p?^?[???e????????????????o?3??b AK4584 ? tx ?o??o?b?t?@?e?????a?o?????r???g?y????1?? 0.5v+/ - 20% ?e????????b figure 7 ??? t1 ? 1:1 ??g?????x????b tx dvss 100 t1 75 w cable 330 figure 7. tx external resistor network
asahi kasei [ak 4584 ] ms0118-j-01 2001/11 - 25 - n ?t???v?????o??g?????o???v???g???t?@?v?x???o ?t???v?????o??g?????o???@????? 2 ??t????@?a?a?\????b xtl1-0 ?r?b?g?????a x ? tal ???g????????r?? ??g???e???o????a?r???g???[?????w?x?^? fs3-0 ?r?b?g??o?????b???r?? x ? tal ???g??????w?x?^? ????i?e???????b xtale= ? l ? ???a xtl1-0 ?r?b?g = ? 11 ? ???????a?????-?u???h??a?~??a?`???l???x?e ?[?^?x??t???v?????o??g???????e?g???r?[?h????r???g???[?????w?x?^? fs3-0 ?r?b?g??o?????b fs3- 0 ?r?b?g?????l? ? 0000 ? ????b x tl1 xtl0 x ? tal frequency 0 0 11.2896mhz 0 1 12.288mhz 1 0 24.576mhz 1 1 ?`???l???x?e?[?^?x?g?p default table 11. reference x ? tal frequency xtl1-0 ?r?b?g = ? 11 ? ??o xtl1-0 ?r?b?g = ? 11 ? register output consumer mode (note 1) pro mode fs3 fs2 fs1 fs0 fs clock comparison byte3 bit3,2,1,0 byte0 bit7,6 byte4 bit6,5,4,3 0 0 0 0 44.1khz 3% 0000 01 0000 0 0 0 1 reserved - 0001 (others) 0000 0 0 1 0 48khz 3% 0010 10 0000 0 0 1 1 32khz 3% 0011 11 0000 1 0 0 0 88.2khz 3% (1000) 00 1010 1 0 1 0 96khz 3% (1010) 00 0010 1 1 0 0 176.4khz 3% (1100) 00 1011 1 1 1 0 192khz 3% (1110) 00 0011 table 12. fs information note 1. when consumer mode, byte3 bit3-0 are copied to fs3-0. ????a?v???g???t?@?v?x?????e?g???r?[?h????a?r???g???[?????w?x?^? pem ?r?b?g??o?????b???? ???????a???z?b?g?? (cs12 ?r?b?g = ? 0 ? ??? ) ?a?`???l?? 1 ??????e?g???r?[?h????a?a?r???g???[?????w?x ?^? cs12 ?r?b?g?e ? 1 ? ?????????`???l?? 2 ???????|??????a?\????b pem bit pre-emphasis byte0 bit3,4,5 0 off 1 0x100 1 on 0x100 table 13. pem in consumer mode pem bit pre-emphasis byte0 bit2,3,4 0 off 1 100 1 on 100 table 14. pem in pro mode
asahi kasei [ak 4584 ] ms0118-j-01 2001/11 - 26 - n ?g???[?-????????? int1-0 ?s???a ? h ? ????v??????o? 8 ?a?a??????b (1) unock: pll ?a?a?????b?n???????? ? h ? ??????b ?3???v???a???u???a??m???????a???-???????u?a?3??-???????a?????b?n???? ???b (2) par: ?p???e?b?g???[ ( ?o?c?t?f?[?y?g???[?e??t ) ?e?t?u?t???[??????x?v?3??a?a?h???x 0eh ?e???y???t?????z?b?g?3????b (3) auto: non-linear pcm ?r?b?g?x?g???[?????o?b (4) dtscd: dts-cd ?r?b?g?x?g???[?????o?b (5) audion: non-audio ???o?b (6) pem: ?v???g???t?@?v?x???o?b (7) v: ?o???f?b?e?b???o?b (8) fs: fs ???o?b fs3-0 ?r?b?g?a?????????a 1 ?t?u?t???[??????a ? h ? ??????b fs3-0 ?r?b?g???e? c-bit ??? fs-bit ???? x ? tal ??????g?????o??? (table 12 ?e?q?? ) ???a 1 ?u ???b?n????o????f?[?^?????r?3????b?a?h???x 0eh ?e???y???t?????z?b?g?3????b ???l (1) ???? (8) ??v??? or ?a?e int ?s????o??3????b?a??a?e?v???????????}?x?n?r?b?g???}?x?n?? ???a????v??? int ?s???????f?3???1?? ( ?a??a 0eh ????w?x?^?????f?3??? ) ?b int0 ?o???s????v ???a?3????????a??????a 1024/fs(efh1-0 ?r?b?g?????x?a ) ??? ? h ? ?????e????????b????a par ?r?b?g ?? fs ?r?b?g???x ? 1 ? ?????????l?a?????3??a?a?h???x 0eh ?e???y???t?????z?b?g?3????b ?a?????b?n????`???l???x?e?[?^?x?r?b?g????????w?x?^??x?v?3????a?o??l?e????????b?????? ????a int0 ?s??? unlock, par ?r?b?g?a?l????a??? int1 ?s??? auto, dtscd, audion, vdir ?r?b?g?a ?l???????????b pll ?a off ?????a int1-0 ?s??? ? l ? ??????b register pin unlock par auto dtscd audion pem vdir fs sdto tx 1 x x x x x x x ? l ? output 0 1 x x x x x x previous data output 0 0 1 x x x x x output output 0 0 x 1 x x x x output output 0 0 x x 1 x x x output output 0 0 x x x 1 x x output output 0 0 x x x x 1 x output output 0 0 x x x x x 1 output output table 15. error handling ( x : don ? t care ) note : table 15 ? sdto ????\?[?x??????a dir ?e?i?e????????\????b
asahi kasei [ak 4584 ] ms0118-j-01 2001/11 - 27 - error (unlock, par,..) int1 pin sdto (unlock) mcko,bick,lrck (unlock) previous data register (par, fs) hold ? 1 ? command read 0eh mcko,bick,lrck (except unlock) (fs: around 20khz) sdto (par error) hold time = 0 reset (error) sdto (others) normal operation int0 pin hold time (max: 4096/fs) register (others) free run figure 8. int0/1 pin timing
asahi kasei [ak 4584 ] ms0118-j-01 2001/11 - 28 - initialize each error handling mute dac output release muting pdn pin = "l" to "h" read 0eh yes no read 0eh int0/1 pin = "h" int0/1 pin = "h" yes no figure 9. error handling sequence example n non-pcm/dts-cd ?f?[?^?x?g???[?????o?@?\ AK4584 ? non-pcm ?f?[?^?x?g???[??????o?@?\?e???????b dolby ? ac-3 data stream in iec60958 interface ? ???????? 32bit mode ? non-pcm ?f?[?^?v???a???u???a???o?3?????a auto ?r?b?g?a ? 1 ? ??????b?v?? ?a???u??? 96bit sync code ? 0x0000, 0x0000, 0x0000, 0x0000, 0xf872 and 0x4e1f ???\???3????b??? 4096 ?t?? ?[???? sync code ?a???o?3???????a?x? sync code ?a???o?3????? auto ?r?b?g? ? 0 ? ????b????a???v ???a???u???a???o?3???????a sync code ????? 2 ?o?c?g ( pc, pd) ?e???w?x?^??i?[????b??l? dts-cd ? ?f?[?^?v???a???u???a???o?3???? dts-cd ?r?b?g?a ? 1 ? ??????b??? 4096 ?t???[???? sync code ?a???o?3 ???????a?x? sync code ?a???o?3????? dts-cd ?r?b?g? ? 0 ? ????b
asahi kasei [ak 4584 ] ms0118-j-01 2001/11 - 29 - n ?i?[?f?b?i?c???^?t?f?[?x?t?h?[?}?b?g 5 ??t??f?[?^?t?h?[?}?b?g (table 16) ?a dif2-0 ?r?b?g???i?e???????b?s???[?h??? msb ?t?@?[?x?g?a 2 ? s ?r ???v???????g??f?[?^?t?h?[?}?b?g?? sdto ? bick ?????o?a????o??3??a sdti ? bick ???????a????? ?b?`?3????b?i?[?f?b?i?c???^?t?f?[?x??}?x?^???[?h???x???[?u???[?h?????????b?}?x?^???[?h?? ? lrck ?? bick ??o?????a?x???[?u???[?h???????????b?}?x?^???[?h??? lrck ??g???? bick ??g????????? fs ?? 64fs ????b 20 ?r?b?g??o??t?h?[?}?b?g (mode0-1) ????a?t?u?t???[??? lsb ??a????????????b mode2-4 ????o? 4 ?r?b?g? aux ?f?[?^????b figure 10 ??r?b?g?\???e?|????b sdti ???t?h?[?}?b?g?????a mode2, 3, 4 ?e 16 ~ 20 ?r?b?g???g?p????????a?f?[?^??? lsb ?? ? 0 ? ?e ??????o?3??b sub-frame of iec60958 0 preamble 3 4 lsb aux. msb 23 7 8 11 12 v u c p 27 28 29 30 31 lsb msb 0 AK4584 audio data (sdto, msb first) figure 10. bit structure mode dif2 dif1 dif0 sdto sdti lrck bick 0 0 0 0 24bit, msb justified 16bit, lsb justified h/l 3 32fs 1 0 0 1 24bit, msb justified 20bit, lsb justified h/l 3 40fs 2 0 1 0 24bit, msb justified 24bit, msb justified h/l 3 48fs 3 0 1 1 24bit, i 2 s compatible 24bit, i 2 s compatible l/h 3 48fs 4 1 0 0 24bit, msb justified 24bit, lsb justified h/l 3 48fs default table 16. audio data format
asahi kasei [ak 4584 ] ms0118-j-01 2001/11 - 30 - lrck bick(32fs) sdto(o) sdti(i) 0 23 22 15 14 1 10 21 13 2 3 15 7 6 5 4 3 2 1 0 14 13 12 11 9 8 10 9 11 12 13 14 15 0 1 2 3 23 22 21 15 14 13 15 14 13 12 11 9 8 10 1 0 23 15 7 6 5 4 3 2 1 0 10 9 11 12 13 14 15 bick(64fs) 0 1 18 2 3 19 20 31 0 1 2 3 1 0 18 19 20 31 sdto(o) sdti(i) 23 22 21 don't care 1 0 7 23 22 21 15 14 13 23 2 1 0 17 6 5 4 3 15 14 13 12 7 6 5 4 3 17 12 don't care sdto-23:msb, 0:lsb sdti-15:msb, 0:lsb lch data rch data figure 11. mode 0 timing lrck bick(64fs) sdto(o) sdti(i) 0 23 22 don't care 1 2 12 8 0 11 0 12 13 24 31 0 1 2 23 22 12 11 0 1 0 23 8 1 0 12 13 31 sdto-23:msb, 0:lsb sdti-19:msb, 0:lsb lch data rch data 19 1 don't care 19 24 figure 12. mode 1 timing lrck bick(64fs) sdto(o) sdti(i) 0 23 22 don't care 1 2 4 0 0 20 21 24 31 0 1 2 23 22 0 1 0 23 0 22 20 21 31 23:msb, 0:lsb lch data rch data don't care 24 3 2 1 4 3 2 1 23 22 22 23 23 22 23 23 1 2 3 4 1 2 3 4 figure 13. mode 2 timing
asahi kasei [ak 4584 ] ms0118-j-01 2001/11 - 31 - lrck bick(64fs) sdto(o) sdti(i) 0 23 22 don't care 1 2 4 0 0 25 21 24 0 1 2 23 22 0 1 0 0 22 25 21 23:msb, 0:lsb lch data rch data don't care 24 3 2 1 4 3 2 1 23 22 22 23 23 22 23 1 2 3 4 1 2 3 4 3 figure 14. mode 3 timing lrck bick(64fs) sdto(o) sdti(i) 0 23 22 don't care 1 2 16 0 15 0 24 31 0 1 2 23 22 16 15 0 1 0 23 8 1 0 31 23:msb, 0:lsb lch data rch data 23 8 don't care 23 24 8 9 1 8 9 figure 15. mode 4 timing
asahi kasei [ak 4584 ] ms0118-j-01 2001/11 - 32 - n ?}?x?^?[???[?h???x???[?u???[?h???????| ?}?x?^?[???[?h???x???[?u???[?h???????|? m/s ?s?????s????b ? h ? ???}?x?^?[???[?h?a ? l ? ???x???[?u?? ?[?h????b AK4584 ?a?}?x?^?[???[?h??????a AK4584 ???? mcko, bick, lrck ?a?o??3????b AK4584 ?a ?x???[?u???[?h??????a AK4584 ????? mcko ??y?a?o??3??a bick, lrck ??o?? dsp ???????????k?v?a ?????????a?o?? dsp ???? mcko ?e?a???? bick, lrck ?e????????o?3??b mcko1/2 bick, lrck slave mode mcko1 = output mcko2 = output bick = input lrck = input master mode mcko1 = output mcko2 = output bick = output lrck = output table 17. master mode/slave mode n ?n???b?n??????p???[?_?e??????w AK4584 ?a?p???[?_?e?????a?x???[?u???[?h / ?}?x?^?[???[?h????w??-?a xtale ?s?????n???b?n?o??e?r?? ?g???[?????????b mcko1 ? dmck ?s?????o??e?f?b?z?[?u?????????b pdn pin m/s pin xtale pin cm1-0 bit mcko1/2 bick, lrck dir, codec l mcko1 = l mcko2 = l l h mcko1 = output 1) mcko2 = output 1) bick = input lrck = input power down l mcko1 = l mcko2 = l l h h default ?l ? 01 ? ??? mcko1 = output 1) mcko2 = output 1) bick = l lrck = l power down l bick = input lrck = input h h don ? t care ?g?p?a mcko1 = output 2) mcko2 = output 2) bick = output lrck = output normal operation table 18. clock operation note 1) : dir ?a?p???[?_?e?????????a?n???b?n?\?[?x? x ? tal ?-?u?q???-??o???n???b?n??????b note 2) : ?n???b?n?\?[?x? cm1-0 ?r?b?g??????3????b?a??a???[?h??????? mcko ?o??a?u???i? ?a?~??????a??????b note: xtale= ? l ? ???o???n???b?n?e ac ?j?b?v???????g?p??????a pdn ?s???e ? l ? ????????a xti ?s???e ? l ? ????????o?3??b n ?f?b?w?^?? hpf adc ? dc ?i?t?z?b?g?l?????z?????????f?b?w?^?? hpf ?e???????b hpf ? fc ??a fs=44.1khz ???a 0.9hz ? ???????a??g??????? fs ????????b
asahi kasei [ak 4584 ] ms0118-j-01 2001/11 - 33 - n ???{?????[?? adc ??o?i? 37 ???x???a 0.5db ?x?e?b?v? 2ch ?????a?i???o?{?????[?? (ipga) ?e?????a???i? 128 ?x?e?b?v ( ?~???[?g?e??t ) ??f?b?w?^???{?????[?? ( ?? att: iatt) ?e???????b???{?????[????r???g???[???? ???a?h???x????w?x?^??a?t?c???3??a msb ?a ? 1 ? ????? ipga ?a??????a ? 0 ? ????? iatt ?a????????b ipga ??a?i???o?{?????[????????a?f?b?w?^???????????? s/n ??p?????a????? (table 19) ?b?3????[ ???n???x???o?@?\??????????|?m?c?y?e???????b?[???n???x???o??e ch ?????s?????b?[???n?? ?x????????^?c???a?e?g???-??i???????????b??????^?c???a?e?g???? (to) ? fs ??????a???? ???[?h??? to=256/fs ???? 2048/fs ?e?i?e???????b?[???n???x?????^?c???a?e?g?? ipga ?a????????o? ipga ???w?x?^??v???l?e???????t???a?o??? ipga ?l??3????????b????a?^?c???a?e?g???????^?c ?} (l/r ??? ) ?a???z?b?g?3??a???????????v?? ipga ?l??????x????a?n?????b?[???n???x???o?@?\??[ ???n???x?c?l?[?u???r?b?g (zcei) ?? on/off ?a?\????b iatt ???????j?a?a???3????^?????o?{?????[???????x???e??????|??????a???x????????? 8031 ?x?e?b?v ???\?t?g?j?????b?????????????|?m?c?y??s?-?o??1???b input gain setting 0db +6db +18db fs=44.1khz, a-weight 100db 98db 90db table 19. pga+adc s/n ztm1 ztm0 ???? 2 ?{?? 0 0 256/fs 512/fs 0 1 512/fs 1024/fs 1 0 1024/fs 2048/fs default 1 1 2048/fs 4096/fs table 20. zero crossing timeout n ?f?b?g???t?@?v?x?t?b???^?r???g???[?? iir ?t?b???^???? 3 ??g?? (32khz, 44.1khz, 48khz) ??????f?b?g???t?@?v?x?t?b???^ (50/15 m s ??? ) ?e?????? ????b dem1-0 ?r?b?g???f?b?g???t?@?v?x?t?b???^?e?r???g???[???????? (table 21) ?b 2 ?{???a 4 ?{?????? ???????1???b dem1 dem0 mode 0 0 44.1khz 0 1 off default 1 0 48khz 1 1 32khz table 21. de-emphasis control n ?o??{?????[?? AK4584 ? mute ?e??t 0.5db ?x?e?b?v?a 256 ???x????`???l??????f?b?w?^???o??{?????[?? (att) ?e???? ???b???{?????[??? dac ??o?i???????f?[?^?e 0db ???? - 127db ????????a?????~???[?g????b ?y??l????j???\?t?g?j?????b?]????a?j?????x?c?b?`???o?m?c?y??-?????1???b
asahi kasei [ak 4584 ] ms0118-j-01 2001/11 - 34 - n ?\?t?g?~???[?g?@?\ dac ????f?b?w?^??????\?t?g?~???[?g?@?\?e???????b?\?t?g?~???[?g? smute ?r?b?g???r???g???[ ?????????b smute ?r?b?g?e ? h ? ????? 1024lrck ?t?c?n???? dac ??f?[?^?a - ( ? 0 ? ) ????a?e?l?[?v???? ?3????b smute ?r?b?g?e ? l ? ????? - ????a?e???3??a - ???? 1024lrck ?t?c?n???? 0db ??????a????b ?\?t?g?~???[?g?j?n???a 1024lrck ?t?c?n??????e???3?????a?e?l?[?v?????a???f?3??a????t?c?n???? 0db ??????a????b ?\?t?g?~???[?g?@?\??o??{?????[??????????????a?c????3??????w????b smute attenuation 1024/fs 0db - 1024/fs gd gd (1) (2) (3) lout / rout (4) 8192/fs dzf pin figure 16. ?\?t?g?~???[?g?@?\???[?????o?@?\ (1) 1024lrck ?t?c?n?? (1024/fs) ?????f?[?^?a - ( ? 0 ? ) ????a?e?l?[?v?????3????b (2) ?f?b?w?^??????????a?i???o?o???q?x?? (gd) ?e??????b (3) 1024lrck ?t?c?n??????\?t?g?~???[?g?a?e???3?????a?e?l?[?v?????a???f?3??a????t?c?n???? 0db ??????a????b (4) ???f?[?^?a???`???l???? 8192 ???a???? ? 0 ? ?????a dzf ?s???a ? h ? ??????b??????a???f?[?^ ?a ? 0 ? ????-?????a dzf ?s??? ? l ? ??????b
asahi kasei [ak 4584 ] ms0118-j-01 2001/11 - 35 - n ?[?????o?@?\ AK4584 ? dac ? l/r ?`???l??????[?????o?@?\?e???????b l/r ???`???l??????f?[?^?a 8192 ???a???? ? 0 ? ?????a dzf ?s???a ? h ? ??????b??????a???f?[?^?a ? 0 ? ????-???? dzf ?s???a ? l ? ??????b?[ ?????o?@?\? dzfe ?r?b?g???3??????????b?????a???`???l??? dzf ?s????? ? l ? ????b pdn ?s???a ? l ? ???????`???l??? dzf ?s??? ? l ? ????b pdn ?s???????p???[?_?e???e?? (pdn ?s?? = ? l ? ? ? h ? ) ???a dzf ?s??? ? l ? ? ? h ? ?????????b pwvrn ?r?b?g?a ? 0 ? ?????a???`???l??? dzf ?s??? ? l ? ????b rstdan ?r?b?g? ? 0 ? ?e???????t??????? dzf ?s??? ? h ? ????a??????a 4/fs ~ 5/fs ??? lsi ????a???z?b?g?3 ????b rstdan ?r?b?g? ? 1 ? ?e?????????????? 6/fs ~ 7/fs ????a dzf ?s??? ? h ? ?e?o?????a????? ? l ? ?? ????b???l? rstdan ?r?b?g? ? 0 ? ?e?????????????? 5/fs ??? rstdan ?r?b?g? ? 1 ? ?a????????????a lsi ?????3?????z?b?g?3???????a??????b pwdan ?r?b?g? ? 0 ? ?e???????t??????? dzf ?s??? ? h ? ????a??????a 4/fs ~ 5/fs ??? lsi ????a???z?b?g?3 ????b pwdan ?r?b?g? ? 1 ? ?e?????????????? 6/fs ~ 7/fs ????a dzf ?s??? ? h ? ?e?o?????a????? ? l ? ?? ????b???l? pwdan ?r?b?g? ? 0 ? ?e?????????????? 5/fs ??? pwdan ?r?b?g? ? 1 ? ?a????????????a lsi ?????3?????z?b?g?3???????a??????b pdn ?s?? = ? h ? ???a pwdan ?r?b?g = ? 1 ? ???a rstdan ?r?b?g = ? 1 ? ????????????? 1/fs ???????[?????o?@?\ ?????? 8192 ?j?e???g?a?j?n?3????b n ???z?b?g???p???[?_?e?? AK4584 ??a pdn ?s?????????h?s???p???[?_?e???????w?x?^????????p???[?_?e???a?a?\??? (table 22) ?b?d?1???????????k?? pdn ?s?????x ? l ? ?e????????z?b?g????o?3??b pdn pwditn pwvrn pwadn pwdan cm1-0 function register initialization l x x x x x all power-down yes 0 x x x x dit power-down no x 0 x x x vref power-down no x x 0 x x adc power-down no x x x 0 x dac power-down no x x x x 00 x ? tal power-down no x x x x 01 pll power-down no table 22. reset & power down
asahi kasei [ak 4584 ] ms0118-j-01 2001/11 - 36 - n ?v???a???r???g???[???c???^?t?f?[?x 4 ????v???a?? i/f ?s?? : csn, cclk, cdti, cdto ?????????y?y?????y?o??e?s????b i/f ????f?[?^? chip address(2bits, c1/0, ? 00 ? ??? ) ?a read/write(1bit) ?a register address(msb first, 5bits) ?? control data(msb first, 8bits) ???\???3????b?f?[?^???m?? cclk ? ? ? ???e?r?b?g?e?o???a??m?? ? - ? ????????y???b?f?[?^??? ?????y? csn ? ? - ? ???l????????b cclk ??n???b?n?x?s?[?h? 5mhz(max) ????b?a?n?z?x?????? csn ?e ? h ? ???? ? l ? ????????o?3??b?`?b?v?a?h???x? ? 00 ? ????????b?`?b?v?a?h???x ? 00 ? ??o?????? ???????????y?a?3????????b pdn ?s?? = ? l ? ????????w?x?^?l???????3????b csn cclk cdti 0 1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 c1 c0 r/w a4 a3 a2 a1 a0 d7 d6 d5 d4 d3 d2 d1 d0 cdto hi-z write cdti c1 c0 r/w a4 a3 a2 a1 a0 cdto hi-z read d7 d6 d5 d4 d3 d2 d1 d0 hi-z c1 - c0 : chip address (fixed to "00") r/w : read / write ("1" : write, "0" : read) a4 - a0 : register address d7 - d0 : control data figure 17. control i/f timing
asahi kasei [ak 4584 ] ms0118-j-01 2001/11 - 37 - n ???w?x?^?}?b?v addr register name d7 d6 d5 d4 d3 d2 d1 d0 00h power down control 0 0 0 test pwditn pwvrn pwadn pwdan 01h reset control 0 0 0 0 0 0 rstadn rstdan 02h clock & format control 0 0 0 dif2 dif1 dif0 dfs1 dfs0 03h deem & volume control msdto smute dzfe zcei ztm1 ztm0 dem1 dem0 04h lch ipga control ipgl7 ipgl6 ipgl5 ipgl4 ipgl3 ipgl2 ipgl1 ipgl0 05h rch ipga control ipgr7 ipgr6 ipgr5 ipgr4 ipgr3 ipgr2 ipgr1 ipgr0 06h lch oatt control attl7 attl6 attl5 attl4 attl3 attl2 attl1 attl0 07h rch oatt control attr7 attr6 attr5 attr4 attr3 attr2 attr1 attr0 08h in/out source control 0 0 dac1 dac0 pcm1 pcm0 dit1 dit0 09h clock mode control ocks1 ocks0 icks1 icks0 cm1 cm0 xtl1 xtl0 0ah dir control 0 cs12 ops1 ops0 ips1 ips0 efh1 efh0 0bh dit control 0 0 tx3e tx2e tx1e udit vdit tch 0ch int0 mask mat0 mdts0 man0 mv0 mpe0 mul0 mpr0 mfs0 0dh int1 mask mat1 mdts1 man1 mv1 mpe1 mul1 mpr1 mfs1 0eh receiver status 0 auto dtscd audion vdir pem unlock par fs 0fh receiver status 1 0 0 0 0 fs3 fs2 fs1 fs0 10h rx channel status byte 0 cr7 cr6 cr5 cr4 cr3 cr2 cr1 cr0 11h rx channel status byte 1 cr15 cr14 cr13 cr12 cr11 cr10 cr9 cr8 12h rx channel status byte 2 cr23 cr22 cr21 cr20 cr19 cr18 cr17 cr16 13h rx channel status byte 3 cr31 cr30 cr29 cr28 cr27 cr26 cr25 cr24 14h rx channel status byte 4 cr39 cr38 cr37 cr36 cr35 cr34 cr33 cr32 15h tx channel status byte 0 ct7 ct6 ct5 ct4 ct3 ct2 ct1 ct0 16h tx channel status byte 1 ct15 ct14 ct13 ct12 ct11 ct10 ct9 ct8 17h tx channel status byte 2 ct23 ct22 ct21 ct20 ct19 ct18 ct17 ct16 18h tx channel status byte 3 ct31 ct30 ct29 ct28 ct27 ct26 ct25 ct24 19h tx channel status byte 4 ct39 ct38 ct37 ct36 ct35 ct34 ct33 ct32 1ah burst preamble pc byte 0 pc7 pc6 pc5 pc4 pc3 pc2 pc1 pc0 1bh burst preamble pc byte 1 pc15 pc14 pc13 pc12 pc11 pc10 pc9 pc8 1ch burst preamble pd byte 0 pd7 pd6 pd5 pd4 pd3 pd2 pd1 pd0 1dh burst preamble pd byte 1 pd15 pd14 pd13 pd12 pd11 pd10 pd9 pd8 pdn = ? l ? resets the registers to their default values. n ???w?x?^?y????????_ ?d?1????????a pdn ?s???e ? l ? ???? ? h ? ?????????a??o??v?[?p???x???f?o?c?x?e?????????o?3??b? ????a?r???g???[?????w?x?^?????l?? AK4584 ????z?b?g???????b (1) ?n???b?n???[?h????o??t?h?[?}?b?g????y??e?s??b (2) rstadn, rstdan ?e ? 1 ? ???????z?b?g????e?e?????b reset control register (01h) ?e?q??????o?3??b (3) adc ?o??? dac ?o?????z?b?g????e?e????????o?????~???[?g????o?3??b ????a?}?x?^???[?h??? lrck ?? bick ?o????g???a?f???[?e?b?a?????a?\???a??????b ?n???b?n?y????w?x?^????x??a rstadn ?? rstdan ?e ? 0 ? ??????????s????o?3??b??????a adc ?o??? dac ?o???o?????~???[?g????o?3??b????a?}?x?^???[?h??? lrck ?? bick ?o????g???a?f???[?e?b?a ?????a?\???a??????b
asahi kasei [ak 4584 ] ms0118-j-01 2001/11 - 38 - n ????? addr register name d7 d6 d5 d4 d3 d2 d1 d0 00h power down control 0 0 0 test pwditn pwvrn pwadn pwdan r/w rd rd rd r/w r/w r/w r/w r/w default 0 0 0 1 1 1 1 1 pwdan: dac power down 0: power down 1: power up ? 0 ? ?? dac ????y?p???[?_?e???3????b?????a lout/rout ??|?? hi-z ????a?o? att ?? ?u ? ffh ? ??????b?a??a?r???g???[?????w?x?^???e???????3???1???b????a?r???g???[ ?????w?x?^??????????y??a?\????b?p???[?_?e???e??????o? att ?a?r???g???[?????w?x?^??y ??l (06h, 07h) ????t?f?[?h?c??????b?y????y???e??????m?c?y?-????a?\???a???????o?? ???~???[?g????o?3??b pwadn: adc power down 0: power down 1: power up ? 0 ? ?? adc ????y?p???[?_?e???3????b?????a sdto ??|?? ? l ? ????a?? pga ???u ? 00h ? ??????b?a??a?r???g???[?????w?x?^???e???????3???1???b????a?r???g???[?????w?x ?^??????????y??a?\????b?p???[?_?e???e??????? pga ?a?r???g???[?????w?x?^??y??l (04h, 05h) ????t?f?[?h?c??????b?a??a????? 516lrck ?t?c?n??? ? 0 ? ?a?o??3????b pwvrn: vref power down 0: power down 1: power up ? 0 ? ???f?o?c?x?s??a?p???[?_?e???3????b?p???[?_?e??????r???g???[?????w?x?^???e??? ????3???1???b????a?r???g???[?????w?x?^??????????y??a?\????b pwditn: dit power down 0: power down 1: pow er up ? 0 ? ?? dit ????y?a?p???[?_?e???3????b?]????a tx1, tx2 ???o?c?t?f?[?y?m????o?????? ???a?a tx3 ??????o?c?t?f?[?y?m????o??3???1???b?p???[?_?e??????r???g???[?????w?x ?^???e???????3???1???b????a?r???g???[?????w?x?^??????????y??a?\????b test: test bit ? 1 ? ????????b???r?b?g???????????????o?3??b
asahi kasei [ak 4584 ] ms0118-j-01 2001/11 - 39 - addr register name d7 d6 d5 d4 d3 d2 d1 d0 01h reset control 0 0 0 0 0 0 rstadn rstdan r/w rd rd rd rd rd rd r/w r/w default 0 0 0 0 0 0 0 0 rstdan: dac reset 0: reset 1: normal operation ? 0 ? ?? dac ???a???z?b?g?????????b?????a lout/rout ??|?? vcom ???x??????a?o? att ???u ? ffh ? ??????b?a??a?r???g???[?????w?x?^???e???????3???1???b????a?r ???g???[?????w?x?^??????????y??a?\????b???z?b?g?e??????o? att ?a?r???g???[?????w?x?^ ??y??l (06h, 07h) ????t?f?[?h?c??????b?y????y???e??????m?c?y?-????a?\???a?????? ?o?????~???[?g????o?3??b rstadn: adc reset 0: reset 1: normal operation ? 0 ? ?? adc ????y???z?b?g?????????b?????a sdto ??|?? ? l ? ????a?? pga ???u ? 00h ? ??????b?a??a?r???g???[?????w?x?^???e???????3???1???b????a?r???g???[?????w?x ?^??????????y??a?\????b?p???[?_?e???e??????? pga ?a?r???g???[?????w?x?^??y??l (04h, 05h) ????t?f?[?h?c??????b?a??a????? 516lrck ?t?c?n??? ? 0 ? ?a?o??3????b addr register name d7 d6 d5 d4 d3 d2 d1 d0 02h clock and format control 0 0 0 dif2 dif1 dif0 dfs1 dfs0 r/w rd rd 0 r/w r/w r/w r/w r/w default 0 0 0 0 1 0 0 0 dfs1-0: sampling sp eed control (see table 6) ????l? ? 00 ? ????b dif2-0: audio data interface modes (see table 16) ????l? ? 010 ? (adc, dac ??? 24bit ?o?l?? ) ????b
asahi kasei [ak 4584 ] ms0118-j-01 2001/11 - 40 - addr register name d7 d6 d5 d4 d3 d2 d1 d0 03h deem and volume control msdto smute dzfe zcei ztm1 ztm0 dem1 dem0 r/w r/w r/w r/w r/w r/w r/w r/w r/w default 0 0 0 1 1 0 0 1 dem1-0: de-emphasis response (see table 21) ????l? ? 01 ? (off) ????b ztm1-0: zero crossing time-out period select (see table 20) ????l? ? 10 ? (1024/fs) ????b zcei: adc ipga zero crossing enable 0: input pga gain cha nges occur immediately 1: input pga gain changes occur only on zero-crossing or after timeout. ????l? ? 1 ? ( ?c?l?[?u?? ) ????b dzfe: data zero detect enable 0: disable 1: enable ?[?????o?@?\? dzfe ?r?b?g?e ? 0 ? ?????????3??????????b?????a dzf ?s????? ? l ? ????b ????l? ? 0 ? ( ?f?b?z?[?u?? ) ????b smute: dac in put soft mute control 0: normal operation 1: dac outputs soft-muted ?\?t?g?~???[?g??o? att ????????????a?f?b?w?^???i???s?3????b msdto: sdto mute control 0: disable 1: enable msdto ?r?b?g?a ? 1 ? ????a sdto ?o???~???[?g?e??????b?????a sdto ?o?? ? l ? ??????b ????l? ? 0 ? ( ?f?b?z?[?u?? ) ????b addr register name d7 d6 d5 d4 d3 d2 d1 d0 04h lch ipga control ipgl7 ipgl6 ipgl5 ipgl4 ipgl3 ipgl2 ipgl1 ipgl0 05h rch ipga control ipgr7 ipgr6 ipgr5 ipgr4 ipgr3 ipgr2 ipgr1 ipgr0 r/w r/w r/w r/w r/w r/w r/w r/w r/w default 0 1 1 1 1 1 1 1 ipgl/r7-0: adc input gain leve l (see table 23) ????l? ? 7fh ? (0db) ????b 7fh ??o??r?[?h?e???????t?? 128 ???x????f?b?w?^?? att ?a???????b att ???? 8032 ???x??? ???j?a att ????????a?o?? 128 ???x????^?????o?f?[?^??????????????b att ?l????j? ? 8032 ???x?????\?t?g?j?????b??|???a 127 ???? 126 ??????a???? 8031 ???? 7775 ??? fs ?t?c ?n????? ? 1 ? ???a????????b 127 ???? 0(mute) ????? 8031 ?t?c?n?? (182ms@fs=44.1khz) ?????? ??b pdn ?s?? ? l ? ?? ? 00h ? ??y??3??a pdn ?s?? ? h ? ??????l ? 7fh ? ??? 8031 ?t?c?n?????t?f?[?h?c??? ???b pwadn ?r?b?g = ? 0 ? ?? ? 00h ? ??y??3??a pwadn ?r?b?g = ? 1 ? ?????????y??l????t?f?[?h?c??? ???b?a??a????? 516 ?t?c?n??? ? 0 ? ?a?o??3????b rstadn ?r?b?g = ? 0 ? ?? ? 00h ? ??y??3??a rstadn ?r?b?g = ? 1 ? ?????????y??l????t?f?[?h?c?? ????b?a??a????? 516 ?t?c?n??? ? 0 ? ?a?o??3????b
asahi kasei [ak 4584 ] ms0118-j-01 2001/11 - 41 - data ????l (datt) gain (db) step ?? (db) 255 - 165 - +18 - 164 - +18 - 163 - +17.5 0.5 162 - +17 0.5 : - : 0.5 130 - +1.0 0.5 129 - +0.5 0.5 128 - 0 0.5 ipga 0.5db step ??a?i???o?{?????[?? 127 8031 0 - 126 7775 - 0.28 0.28 125 7519 - 0.57 0.29 : : : : 112 4191 - 5.65 0.51 111 3999 - 6.06 0.41 110 3871 - 6.34 0.28 : : : : 96 2079 - 11.74 0.52 95 1983 - 12.15 0.41 94 1919 - 12.43 0.28 : : : : 80 1023 - 17.90 0.53 79 975 - 18.32 0.42 78 943 - 18.61 0.29 : : : : 64 495 - 24.20 0.54 63 471 - 24.64 0.43 62 455 - 24.94 0.30 : : : : 48 231 - 30.82 0.58 47 219 - 31.29 0.46 46 211 - 31.61 0.32 : : : : 32 99 - 38.18 0.67 31 93 - 38.73 0.54 30 89 - 39.11 0.38 : : : : 16 33 - 47.73 0.99 15 30 - 48.55 0.83 14 28 - 49.15 0.60 : : : : 5 10 - 58.10 1.58 4 8 - 60.03 1.94 3 6 - 62.53 2.50 2 4 - 66.05 3.52 1 2 - 72.07 6.02 0 0 mute iatt 128 ???x???e??o????? 8032 ???x??????j ?a datt ???????b??? datt ??y??l? ????\?t?g?j????b ????l =2^m x (2 x l + 33) ? 33 m: data ???? 3-bits l: data ??o? 4-bits table 23. ipga code table
asahi kasei [ak 4584 ] ms0118-j-01 2001/11 - 42 - addr register name d7 d6 d5 d4 d3 d2 d1 d0 06h lch oatt control attl7 attl6 attl5 attl4 attl3 attl2 attl1 attl0 07h rch oatt control attr7 attr6 attr5 attr4 attr3 attr2 attr1 attr0 r/w r/w r/w r/w r/w r/w r/w r/w r/w default 1 1 1 1 1 1 1 1 attl/r7-0: dac oatt le vel (see table 24) ????l? ? ffh ? (0db) ????b attl/r7-0 ?y??l????j?? 7425 ???x?????\?t?g?j?????b ffh(0db) ???? 00h(mute) ????? 7424/fs(168ms@fs=44.1khz) ????????b pdn ?s???e ? l ? ??????a attl/r7-0 ? ffh ???????3????b pwdan ?r?b?g = ? 0 ? ?? ? ffh ? ??y??3??a pwdan ?r?b?g = ? 1 ? ?????????y??l????t?f?[?h?c??? ???b rstdan ?r?b?g = ? 0 ? ?? ? ffh ? ??y??3??a rstdan ?r?b?g = ? 1 ? ?????????y??l????t?f?[?h?c?? ????b ?f?b?w?^???a?e?l?[?^?@?\??\?t?g?~???[?g?@?\??????????????b attl/r7-0 attenuation ffh 0db feh - 0.5db fdh - 1.0db fch - 1.5db : : : : 02h - 126.5db 01h - 127db 00h mute ( - ) table 24. oatt code table
asahi kasei [ak 4584 ] ms0118-j-01 2001/11 - 43 - addr register name d7 d6 d5 d4 d3 d2 d1 d0 08h in/out source control 0 0 dac1 dac0 pcm1 pcm0 dit1 dit0 r/w rd rd r/w r/w r/w r/w r/w r/w default 0 0 0 0 0 0 0 0 dit1-0: input selector for dit (see table 10) ????l? ? 00 ? ????b ? 10 ? ?????x???[?o? (tx1/2) ????l??o??a????????b pcm1-0: input selector for sdto (see table 25) ????l? ? 00 ? ????b pcm1 pcm0 input source 0 0 adc 0 1 sdti 1 0 dir 1 1 n/a default table 25. input selector for sdto dac1-0: input selector for dac (see table 26) ????l? ? 00 ? ????b dac1 dac0 input source 0 0 adc 0 1 sdti 1 0 dir 1 1 n/a default table 26. input selector for dac addr register name d7 d6 d5 d4 d3 d2 d1 d0 09h clock mode control ocks1 ocks0 icks1 icks0 cm1 cm0 xtl1 xtl0 r/w r/w r/w r/w r/w r/w r/w r/w r/w default 0 1 0 0 0 1 0 0 xtl1-0: x ? tal frequency select (see table 11) ????l? ? 00 ? ????b cm1-0: master clock operation mode select (see table 1) ????l? ? 01 ? ????b icks1-0: master clock input frequency select at x ? tal mode (see table 5) ????l? ? 00 ? ????b ocks1-0: master clock output frequency select at pll mode (see table 2) ????l? ? 01 ? ????b
asahi kasei [ak 4584 ] ms0118-j-01 2001/11 - 44 - addr register name d7 d6 d5 d4 d3 d2 d1 d0 0ah dir control 0 cs12 ops1 ops0 ips1 ips0 efh1 efh0 r/w rd r/w r/w r/w r/w r/w r/w r/w default 0 0 0 0 0 0 0 1 efh1-0: interrupt 0 pin hold count select (table 27) ????l? ? 01 ? ????b table 27 ? lrck ? dir ? lrck ???a?z?[???h????? 1/fs ????????b efh1 efh0 hold count 0 0 512lrck 0 1 1024lrck 1 0 2048lrck 1 1 4096lrck default table 27. hold count select ips1-0: input recovery data select (see table 8) ????l? ? 00 ? ????b ops1-0: output through data select for tx1/2 (see table 9) ????l? ? 00 ? ????b cs12: channel status select 0: channel 1 1: channel 2 c-bit, audion, pem, fs ????f?3???`???l???x?e?[?^?x?e?i?e????b ????l? ? 0 ? ????b
asahi kasei [ak 4584 ] ms0118-j-01 2001/11 - 45 - addr register name d7 d6 d5 d4 d3 d2 d1 d0 0bh dit control 0 0 tx3e tx2e tx1e udit vdit tch r/w rd rd r/w r/w r/w r/w r/w r/w default 0 0 1 1 1 1 0 0 tch: channel number select for dit 0: don ? t care (bit20-23 = 0000) 1: stereo (bit20-23 = 1000 : l channel, bit20-23 = 0100 : r channel) dit ????`???l?????? (c-bit ? bit20-23) ?e?????y?????b????l? ? 0 ? ????b ?r???v???[?}???[?h (ct0 ?r?b?g = ? 0 ? ) ?????a?a?h???x 17h ? ct20-23 ?r?b?g????????y?s?a????b vdit: v-bit control for dit 0: valid 1: invalid ????l? ? 0 ? ????b udit: u-bit control for dit 0: u-bit is fixed to ? 0 ? . 1: recovered u-bit is used for dit. (loop mode for u-bit) dir ?a?a?????b?n???a u-bit ? ? 0 ? ?a?o??3????b????l? ? 1 ? ????b tx1e: tx1 output enable 0: disable, tx1 outputs ? l ? . 1: enable ????l? ? 1 ? ????b tx2e: tx2 output enable 0: disable, tx2 outputs ? l ? . 1: enable ????l? ? 1 ? ????b tx3e: tx3 output enable 0: disable, tx3 outputs ? l ? . 1: enable ????l? ? 1 ? ????b
asahi kasei [ak 4584 ] ms0118-j-01 2001/11 - 46 - addr register name d7 d6 d5 d4 d3 d2 d1 d0 0ch int0 mask mat0 mdts0 man0 mv0 mpe0 mul0 mpr0 mfs0 r/w r/w r/w r/w r/w r/w r/w r/w r/w default 1 1 1 1 1 0 0 1 mfs0: mask enable for fs bit 0: mask disable 1: mask enable mpr0: mask enable for par bit 0: mask disable 1: mas k enable mul0: mask enable for unlock bit 0: mask disable 1: mask enable mpe0: mask enable for pem bit 0: mask disable 1: mask enable mv0: mask enable for vdir bit 0: mask disable 1: mask enable man0: mask enable for audion bit 0: mask disable 1: mask enable mdts0: mask enable for dtscd bit 0: mask disable 1: mask enable mat0: mask enable for auto bit 0: mask disable 1: mask enable
asahi kasei [ak 4584 ] ms0118-j-01 2001/11 - 47 - addr register name d7 d6 d5 d4 d3 d2 d1 d0 0dh int1 mask mat1 mdts1 man1 mv1 mpe1 mul1 mpr1 mfs1 r/w r/w r/w r/w r/w r/w r/w r/w r/w default 0 0 0 0 1 1 1 1 mfs1: mask enable for fs bit 0: mask disable 1: mask enable mpr1: mask enable for par bit 0: mask disable 1: mask enable mul1: mask enable for unlock bit 0: ma sk disable 1: mask enable mpe1: mask enable for pem bit 0: mask disable 1: mask enable mv1: mask enable for vdir bit 0: mask disable 1: mask enable man1: mask enable for audion bit 0: mask disable 1: mask enable mdts1: mask enable for dtscd bit 0: mask disable 1: mask enable mat1: mask enable for auto bit 0: mask disable 1: mask enable
asahi kasei [ak 4584 ] ms0118-j-01 2001/11 - 48 - addr register name d7 d6 d5 d4 d3 d2 d1 d0 0eh receiver status 0 auto dtscd audion vdir pem unlock par fs r/w rd rd rd rd rd rd rd rd default 0 0 0 0 0 0 0 0 fs: sampling frequency status 0: no change 1: change ???r?b?g??a?h???x 0fh ? fs3-0 ?r?b?g??????a???o?3???? ? 1 ? ??????b 0eh ?e???y???t? ???????a???z?b?g?3????b par: parity error or bi-phase error status 0: no error 1: error ?t?u?t???[??????p???e?b?g???[?????o?c?t?f?[?y?g???[?a???o?3???? par ?r?b?g?a ? 1 ? ?? ????b 0eh ?e???y???t????????a???z?b?g?3????b unlock: pll lock status 0: lock 1: unlock 0eh ?e???y????????a???z?b?g?3???1???b pem: pre-emphasis bit output 0: off 1: on ???r?b?g??`???l???x?e?[?^?x?e?g???r?[?h????????3????b 0eh ?e???y????????a???z?b?g?3???1???b vdir: validity bit 0: valid 1: invalid 0eh ?e???y????????a???z?b?g?3???1???b audion: audio bit output 0: audio 1: non audio ???r?b?g??`???l???x?e?[?^?x?e?g???r?[?h????????3????b 0eh ?e???y????????a???z?b?g?3???1???b dtscd: dts-cd auto detect 0: no detect 1: detect 0eh ?e???y????????a???z?b?g?3???1???b auto: non-pcm auto detect 0: no detect 1: dete ct 0eh ?e???y????????a???z?b?g?3???1???b
asahi kasei [ak 4584 ] ms0118-j-01 2001/11 - 49 - addr register name d7 d6 d5 d4 d3 d2 d1 d0 0fh receiver status 1 0 0 0 0 fs3 fs2 fs1 fs0 r/w rd rd rd rd rd rd rd rd default 0 0 0 0 0 0 0 0 fs3-0: sampling frequency detection (see table 12) ????l? ? 0000 ? ????b addr register name d7 d6 d5 d4 d3 d2 d1 d0 10h rx channel status byte 0 cr7 cr6 cr5 cr4 cr3 cr2 cr1 cr0 11h rx channel status byte 1 cr15 cr14 cr13 cr12 cr11 cr10 cr9 cr8 12h rx channel status byte 2 cr23 cr22 cr21 cr20 cr19 cr18 cr17 cr16 13h rx channel status byte 3 cr31 cr30 cr29 cr28 cr27 cr26 cr25 cr24 14h rx channel status byte 4 cr39 cr38 cr37 cr36 cr35 cr34 cr33 cr32 r/w rd default not initialized cr39-0: receiver channel status byte 4-0 addr register name d7 d6 d5 d4 d3 d2 d1 d0 15h tx channel status byte 0 ct7 ct6 ct5 ct4 ct3 ct2 ct1 ct0 16h tx channel status byte 1 ct15 ct14 ct13 ct12 ct11 ct10 ct9 ct8 17h tx channel status byte 2 ct23 ct22 ct21 ct20 ct19 ct18 ct17 ct16 18h tx channel status byte 3 ct31 ct30 ct29 ct28 ct27 ct26 ct25 ct24 19h tx channel status byte 4 ct39 ct38 ct37 ct36 ct35 ct34 ct33 ct32 r/w r/w default 0 ct39-0: transmitter channel status byte 4-0 ?r???v???[?}???[?h (ct0 ?r?b?g = ? 0 ? ) ?????a ct20-23 ?r?b?g????????y?s?a????b addr register name d7 d6 d5 d4 d3 d2 d1 d0 1ah burst preamble pc byte 0 pc7 pc6 pc5 pc4 pc3 pc2 pc1 pc0 1bh burst preamble pc byte 1 pc15 pc14 pc13 pc12 pc11 pc10 pc9 pc8 1ch burst preamble pd byte 0 pd7 pd6 pd5 pd4 pd3 pd2 pd1 pd0 1dh burst preamble pd byte 1 pd15 pd14 pd13 pd12 pd11 pd10 pd9 pd8 r/w rd default not initialized pc15-0: burst preamble pc byte 1-0 pd15-0: burst preamble pd byte 1-0
asahi kasei [ak 4584 ] ms0118-j-01 2001/11 - 50 - ?v?x?e???y?v figure 18 ??v?x?e?????????b????i????h???a????a?????]???{?[?h (akd4584) ?e?q??????o?3??b [ ?e?? ] ?e tvdd = 3.0v, ?}?x?^?[???[?h , xtale = ? h ? , dmck = ? l ? 38 37 analog 5v 36 35 34 0.1 m 10 m 39 40 41 42 43 44 5.1 0.1 m 10 m 13k rx2 test1 rx1 pvss r pvdd lin rin vref avdd avss nc pdn int1 cclk csn mcko2 sdto sdti bick lrck m/s dzf vcom lout rout 33 32 31 30 29 28 27 26 25 24 mcko1 23 1 2 3 4 5 6 7 8 9 10 11 shield shield pdn control m p test2 rx3 rx4 int0 cdti cdto xti/mcki 22 21 20 19 18 17 16 15 12 14 13 test3 tx1 tx2 xtale tx3 dvdd dvss tvdd xto dmck 0.1 m 10 m 0.1 m digital 3v 10 m c c audio dsp 0.1 m 2.2 m 5.1 s/pdif sources shield mute mute s/pdif out AK4584 ?? : - ?????-?u???h? 11.2896mhz ???? 24.576mhz ?????????b????a c ??l??????u???q?????????b - AK4584 ? agnd, dgnd ?????r???g???[??????o?????h??a????z?????o?3??b - lout/rout ?a?e???????e?????????????????r?e?????o?3??b - test1, test2, nc ?s??? rx ?m????j?b?v?????o?e?h????????o?????h (pvss) ???????o?3??b - ?v???_?e???s?? (test1, 2) ??o??f?b?w?^?????s????i?[?v?????????o?3??b - r ?s???? 13k w 1% ????r?e pvss ????????????o?3? ?b figure 18. typical connection diagram
asahi kasei [ak 4584 ] ms0118-j-01 2001/11 - 51 - 1. ?o?????h???d?1??f?j?b?v?????o ?d?1???o?????h?????????\?a???????o?3??b???a avdd, dvdd, pvdd ???v?x?e????a?i???o?d?1 ?e????????b avdd, dvdd, pvdd ?a??d?1???????3????????a?d?1???????v?[?p???x?e?l?|??k?v ??????1???b tvdd ??o?? ic ??? i/f ?p??d?1?????v?x?e????f?b?w?^???d?1?e????????o?3??b avss, dvss, pvss ??a?i???o?o?????h???????o?3??b?v?x?e????o?????h??a?i???o???f?b?w?^?????a????z ?? pc ?{?[?h????d?1?????????????????o?3??b???e???f?j?b?v?????o?r???f???t?????-?d?1 ?s??????-???????o?3??b 2. ?????d?3 vref ?s???? avss ??d?3??a?a?i???o??o??????w?e?y?????b???a vref ?s??? avdd ?????a avss ?????? 0.1 m f ??z???~?b?n?r???f???t?e??????b vcom ??a?i???o?m????r?????d?3??????g?????b ???s????????g?m?c?y?e??????????? 2.2 m f ???x??d?e?r???f???t?????? 0.1 m f ??z???~?b?n?r???f ???t?e avss ????????????o?3??b???a?z???~?b?n?r???f???t??s????????????????????????o ?3??b vcom ?s???????d???e??????????1???b?f?b?w?^???m???a???n???b?n????2?????j?b?v???? ?o?e?e???????a vref ?? vcom ?s???????????????????o?3??b 3. ?a?i???o?? ?a?i???o????v???o???g???h??????????a?????r? 10k w ( typ) ????b???????w??????r?????d ?3 ( ?? avdd/2) ?e???s? 0.6 x vref vpp( typ) ??????b???a???m????r???f???t?? dc ?j?b?g????b? ????j?b?g?i?t??g??? fc=1/(2 p rc) ????b AK4584 ? avss ???? avdd ?????d?3?e????????a???????b ?o??r?[?h??t?h?[?}?b?g? 2 ? s ?r???v???????g????b dc ?i?t?z?b?g (adc ???? dc ?i?t?z?b?g???t ) ?? ??? hpf ???l?????z???3????b AK4584 ? 64fs ???a?i???o???e?t???v?????o????b?f?b?w?^???t?b???^??a 64fs ??????{?t????????e?? ?-?j?~???????m?c?y?e?s??????????b AK4584 ? 64fs ?t????m?c?y?e?????3????????a???`?f???a?w?? ?o?t?b???^ (rc ?t?b???^ ) ?e??????????b 4. ?a?i???o?o? ?a?i???o?o???v???o???g???h?o?????????a?o??????w??????r?????d?3 ( ?? avdd/2) ?e???s? 0.6x vref vpp( typ) ??????b???r?[?h??t?h?[?}?b?g? 2 ? s ?r???v???????g???a 7fffffh(@24bit) ??????? ?3??t???x?p?[???a 800000h(@24bit) ???????????t???x?p?[???a 000000h(@24bit) ??? lout/rout ????z ?l? 0v ?a?o??3????b ???? d s ???2??a?-?????????o?m?c?y ( ?v?f?[?s???o?m?c?y ) ??????x?c?b?`?g?l???p?v?^?t?b???^ (scf) ???o?? lpf ???????3????b 5. xti ?s???? xto ?s?? (1) ?????-?u?q?e?g?p???????a xti ?s???? xto ?s????k????l? c ?e??????o?3??b c ??l??????-?u?q ???????? ( typ. 10 ~ 40pf) ?b (2) ?o???????n???b?n?e???????????a xto ?s???e?i?[?v?????? xti ?s????????????o?3??b dvdd ? ????d?3??m???????????o?3??b xti ?s??? cmos ???x??????????a xtale ?s???e ? l ? ?a pdn ?s ???e ? l ? ???????a xti ?s???e ? l ? ????????o?3??b????a dvdd ??o??d?3??m???e?????????a ac ?j?b?v????? xti ?s???????n???b?n?e??????a 40%dvdd ?????d?3??m???e??????o?3??b??? ???a xtale ?s???a pdn ?s??????? xti ?s????????????1???b (3) xti ?s???a xto ?s???e?g?p????????a xto ?s???e?i?[?v???????a xti ?s???e dvss ???????o?3??b
asahi kasei [ak 4584 ] ms0118-j-01 2001/11 - 52 - ?p?b?p?[?w 44pin lqfp (unit: mm) 12.80 0.30 0.80 44 34 33 23 10.00 1 11 12 22 10.00 12.80 0.30 0.37 0.10 0.15 0.60 0.20 0 10 ~ 0.17 0.05 1.70max 0 ~ 0.2 n material & lead finish package molding compound: epoxy lead frame material: cu lead frame surface treatment: solder ( pb free) plate
asahi kasei [ak 4584 ] ms0118-j-01 2001/11 - 53 - ?}?[?l???o 1 akm AK4584vq xxxxxxx xxxxxxx : date code identifier (7 digits) ?d?v???????? ?{????l??3??????i?a?y???a???i??d?l??a????????a???i??p???????\????-???x?? ????a??????b?]??????a?2?g?p?e?????????a?{????f?????????a???v??????????? ?e???e?c???s???a????????e????x?c???s????2?m?f?o?3??b ?{????f??3??????? ?e?}???g?p??n????????o?? ???l????????a?h?????l???a?????? ??????????n?q??a????????a???e??????c?e?????????????1??????a?2?1?3?o?3??b ?{???l????i?a?a?o??????y???a?o???f???????@???????a??? ( ?e??e??t ) ??y????????a ?a?o???????@??????-?a?o???a?a?k?v????b ?????@??a??s???u?a?q??f???p?@??a??q?????p?@?????a??????u ?e?@?????a????s ???a?a???????????e?a????a?????a?g??a??y?????d????1?q?e?y??????a???\?z?3?? ?????????????m?????e?v???3???p?r????e???i?e?g?p?3???????a?k?????o????e???\ ????e???????????e?????o?3??b ???????e???????????p?r????e???i?e?g?p?3???????a???e??a????g?p??????????1?q ?????c?e????????????????1??????2?1?3?o?3??b ??q?l??]?????????????????????y?e?m????????l?p?r????e???i?a?g?p?3??a????g?p ?????1?q???a???????????s????q?l????2???s?????a???????????????2?1?3?o?3??b

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